As I hinted at during our interview with Krisztián Flautner, ARM was quite pleased with how things went with our Peter Greenhalgh ATE that it's going to be giving us access to more key folks over the coming weeks/months. I want to thank all of you for your questions for Krisztián in our last Ask the Experts post, and I want to thank Krisztián for taking the time to respond to you all directly. If you haven't read through the Q&A I'd recommend doing so.

Today I'll be doing a live Google Hangout with Mike Muller, ARM's Chief Technology Officer. Mike Muller was one of the original founders of ARM. We originally scheduled this hangout for late June but had some technical issues with the stream and had to reschedule. 

The Hangout will happen today, Wednesday, July 2, 2014 at 1PM ET. I'll update this post with an embedded feed when we get started. If you've got any questions you want to ask ARM's CTO, give them some thought - we may be able to get them answered live tomorrow.

Update: Here's the feed, we will be starting in 15 minutes:

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  • lada - Wednesday, June 18, 2014 - link

    Mr. Flautner didn't reply to my question, maybe he was not in charge of it. I repeat:
    What security measures does ARM have against industrial espionage and the now infamous NSA meddling with firmwares, software and anything computing related? Have ARM HQ been infiltrated? Are ARM designs safe, or contain some hardware "backdoors" for i.e. elevating rights (userspace to kernel, TrustZone, etc.) ? Are sources of ARM processors open to security audits? Does ARM do security audit on its own? Are sources versioned in a way that would detect "hacks" - changes(backdoors) to the sources ?

    And vice versa, does ARM have access to partners' IP that means third party ARM processors sources, or modified commodity ARM designs? To review them for security purposes?

    These are all questions I've always wished to ask.
  • ddriver - Thursday, June 19, 2014 - link


    This is the billion dollar question, everything else is relative drivel.
  • Krysto - Wednesday, July 2, 2014 - link

    +1, too. I think this is important, and shouldn't be easily dismissed by ARM, as it can only foster distrust. We're already seeing countries trying to avoid US software and hardware because of all the insane spying, and it's probably a matter of time before they start focusing on UK/GCHQ, too.

    Obviously, they're going to answer "No." to that, regardless of what's happening, but hopefully they can offer further proof and transparency for their chips.
  • ddriver - Thursday, July 3, 2014 - link

    My expectations were confirmed, the question was not even vaguely mentioned... AT afraid to ask questions of actual significance...
  • chrone - Thursday, June 19, 2014 - link

    Will ARM pursue higher single thread cpu performance and overall gpu performance to smoother the user experience on Android device especially on the transition animation?

    Hope you guys will targeting lesser soc throttling due to SOC IPC improvement in lower clock speed frequency. :)
  • Homeles - Thursday, June 19, 2014 - link

    Why does everyone think IPC is a magic bullet?
  • Soulwager - Thursday, June 19, 2014 - link

    It's usually more power efficient to scale performance through IPC than clock speed. So much so that major companies are willing to drop clock speeds, despite the advertising advantage of scaling frequency.
  • Homeles - Thursday, June 19, 2014 - link

    This is far too simplistic to be true. If it were true, we'd see extremely wide designs everywhere.
  • extide - Thursday, June 19, 2014 - link

    Well, I think there is some degree of truth to it, I mean look at the Apple A7. I think the issue is that it is really difficult to manage power consumption in a wide design. So, while, making a wide design may not be that difficult, making a wide and highly efficient design is probably quite difficult.
  • Homeles - Thursday, June 19, 2014 - link

    Yeah, and it takes a lot of die area to get that performance. Silvermont performs similarly and takes far less space, and that's without an "L3" cache.

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